A multiplication circuit which is simple in the structural arrangement can be obtained by utilizing a field effect transistor (called FET hereinafter). In such a multiplication circuit one of two variables to be multiplied is applied to a drain electrode of the FET and the other to a gate electrode thereof. Generally, the following relationship of the drain current I.sub.D to the drain-source voltage V.sub.DS and the gate-source voltage V.sub.GS is applicable to the region below the pinch-off voltage V.sub.P : EQU i.sub.d = .beta. v.sub.ds .multidot. v.sub.gs - .beta. v.sub.ds (v.sub.p + 1/2v.sub.ds)
wherein .beta. is a constant (I.sub.DO /V.sub.P.sup.2) and I.sub.DO represents the drain current when the drain voltage is equal to the pinch-off voltage V.sub.P. As is apparent from the above equation, the drain current I.sub.D includes a component proportional to the product of the drain voltage and the gate voltage.
The multiplication circuit, however, has the following disadvantages. The first disadvantage is, although the reason is stated in detail after, in that when either of the drain voltage and the gate voltage is held constant and the other is changed, there is a difference between the output characteristics of the drain current depending on the change of the drain voltage and that of the drain current depending on the change of the gate voltage. The above fact is greatly disadvantageous to the multiplication circuit. Second, the region in which the operation can be achieved with the good linearity is very narrow, because the gradient of the I.sub.D -V.sub.DS characteristics of FET is usually steep with respect to the drain voltage. Finally, as is understood from the above equation, the drain current I.sub.D includes a component affected by the pinch-off voltage V.sub.P and a component proportional to the second power of the drain voltage, besides the component proportional to the product of the drain voltage and the gate voltage. These components function as an error in the result of operation. Especially, the pinch-off voltage V.sub.P is easily affected by the temperature. This is aspect of an FET.